Taking up the 50Days verilog coding challenge. Contribute to Muttu96/Verilog-Challenge development by creating an account on GitHub.

RFSoC-4x2-FPGA-implementation-of-Product-Codes In this repository, the implementation of an eBCH (256,239,2) product code encoder and a decoder on an RFSoC4x2 FPGA board is presented. The ...

The maximum likelihood detection of a digital stream is possible by Viterbi algorithm. In this paper, we present a Convolutional encoder and Viterbi decoder with a constraint length of 7 and code rate ...

The maximum likelihood detection of a digital stream is possible by Viterbi algorithm. In this paper, we present a Convolutional encoder and Viterbi decoder with a constraint length of 7 and code rate ...